Speciality

Profile

Kenji Ishimaru – [Ishimaru Information Engineering Office]

About 25 years, I work in the embedded system design field. I provide responsive, cost effective engineering services and solutions for embedded system development from system architecture to small module design.

Membership

The Institution of Professional Engineers, Japan
Web Analytics Consultants Asssociation
IEEE Computer Society

Work Experience

Embedded Computer System Development

  • Developed 2D/3D graphics computer systems for Arcade Game.
  • Verified and debugged Engineering Sample ICs (ES) on computer boards by using Logic Analyzer.

RTL Design

  • Developed low-power, complex math operation RTL modules for ASIC by SystemVerilog.
  • Planned 3D graphics IP Core system architecture to satisfy required features, gate size and production schedule.
  • Invented the lighting algorism for real-time 3D graphics to generate photo realistic scene image.
  • Invented image compression algorithm suitable for real-time image decoding.

Functional Verification/Hardware Emulator

  • Built SystemVerilog verification environment with random data generation, assertion, and functional coverage.
  • Improved ASIC verification time by porting the designs from RTL simulation environment to a hardware emulation system environment.
  • Evaluated the performance of the hardware emulation system to be introduced when multiple designs shared emulator resources simultaneously.
  • Planned ASIC functional evaluation strategy and implemented on RTL simulation environment.
  • Planned and built functional verification environment for RTL designs by using black-box, white-box and gray-box testing methods, implemented by hardware verification language (e language).
  • Verified standard interfaces (PCI, USB and AMBA AHB) with e verification language.
  • Instructed e verification language methodology to HDL designers of customer companies.
  • Built the Japanese FAQ web site of e verification language for Japanese HDL designers.

FPGA

  • Built processor systems with the designs under test on FPGA based-prototyping systems for robust RTL verification, early software development and IP Core demonstration.
  • Improved middleware development time by building FPGA based-prototyping system before actual ASIC production.

Standards

PCI/PCIe SDRAM/DDR IEEE754
OCP AMBA AHB/AXI/APB USB
OpenGL ES VESA HDMI
Ethernet I2C SPI

Open Source Project

USB Host C Library

Open Source C library for FPGA based USB host. The C library provides APIs to control USB HID(Human Interface Device) class device and Mass Storage class device.
UsbHLib
http://www.prtissimo.com/jp/usbhlib/usbhlib_top.html

3D Graphics IP Core

Wire-Frame 3D Graphics IP Core for small size FPGA is available on OpenCores.org.
WF3D
http://opencores.com/project,wf3d

Technical Magazine

FPGA Magazine (CQ Publishing Co.,Ltd.)

No.14
DVI implementation for ZedBoard and DE0-nano-SoC
http://www.kumikomi.net/fpga/sample/0014/FPGA14_128.pdf

No.13
AXI Performance Comparison, Cyclone V SoC and Zynq
http://www.kumikomi.net/fpga/sample/0013/FPGA13_094.pdf

USB Communication Target Device
http://www.kumikomi.net/fpga/sample/0013/FPGA13_124.pdf

No.12
USB Communication Target Device
http://www.kumikomi.net/fpga/sample/0012/FPGA12_092.pdf

No.8
USB Communication Device Class
http://www.kumikomi.net/fpga/sample/0008/FPGA08_118.pdf

No.6
Project Porting from DE0 to DE0-nano
http://www.kumikomi.net/fpga/sample/0006/FPGA06_138.pdf

No.4
USB storage device with FAT file system

No.2
USB Full-Speed Host System – Hardware Part –
http://www.kumikomi.net/fpga/sample/0002/FPGA02_046_04syo.pdf

Interface (CQ Publishing Co.,Ltd.)

May, 2014
Open source Ethernet IP Core and Open source TCP/IP protocol stack
http://www.kumikomi.net/interface/sample/201405/if05_160.pdf

December, 2013
USB Full-Speed Host System – How to use USB host library –
http://www.kumikomi.net/interface/sample/201312/if12_175.pdf

November, 2013
USB Full-Speed Host System – Programming, initialization and main loop –
http://www.kumikomi.net/interface/sample/201311/if11_170.pdf